PCB wiring is a key factor in ESD protection, FS Technology believes that a reasonable PCB design can reduce unnecessary costs caused by fault inspection and rework. In PCB design, it is more important to overcome the electromagnetic interference (EMI) electromagnetic field effect generated by the discharge current, because the transient voltage suppression stopper (TVS) diode is used to suppress the direct charge injection caused by the ESD discharge.
This article will provide optimized ESD protection for PCB design criteria.
1. Circuit loop.
When current enters circuit loops by induction, these loops are closed and have variable magnetic flux. The current range is proportional to the area of the ring. Larger loops contain more magnetic flux and therefore have stronger current induction in the circuit. Therefore, the loop area must be reduced. The most common loop consists of power and ground wires.
Multilayer PCB designs employ power and ground planes, where possible. Multilayer circuit boards not only minimize the circuit area between power and ground, but also reduce the high-frequency EMI electromagnetic fields generated by ESD pulses. If multilayer boards were not possible, FS Technology would have to connect the circuits for the power and ground lines into a grid. The grid connection can play the role of power and ground, and the printed lines of each layer should pass through holes and the connection interval in each direction should be within 6 cm. In addition, when wiring, the power and ground printed lines produced by FS Technology are as close as possible, which can also reduce the loop area.
Another way to reduce loop area and induced current is to reduce parallel paths between interconnects. When a signal cable longer than 30 cm must be used, a protective wire can be used. A better approach is to place the ground near the signal lines. The signal line should be within 13mm of the protection line or grounding line. Arrange long signal wires (>30cm) or power wires and their ground wires of each sensitive element in a crossover. Crossovers must be separated from top to bottom or left to right.
2. The length of the circuit connection.
Long signal lines can also be used as antennas for receiving ESD pulse energy. Trying to use short signal lines can reduce the efficiency of antennas receiving ESD electromagnetic fields. In order to reduce the printed line length of the interconnection, FS Technology will try to place the interconnection equipment in the adjacent position.
3. Inject the ground charge.
Direct discharge of ESD to the ground plane can damage sensitive circuits. Use one or more high frequency bypass capacitors between the power and ground of the consumables. Bypass capacitors reduce charge injection and maintain the voltage difference between the power and ground ports. The TVS shunts the induced current, maintaining the potential difference of the TVS clamping voltage. To reduce parasitic inductive effects, TVS and capacitors should be placed as close as possible to the protected IC.
PCB wiring is a key factor in ESD protection, FS Technology believes that a reasonable PCB design can reduce unnecessary costs caused by fault inspection and rework. In PCB design, it is more important to overcome the electromagnetic interference (EMI) electromagnetic field effect generated by the discharge current, because the transient voltage suppression stopper (TVS) diode is used to suppress the direct charge injection caused by the ESD discharge.
This article will provide optimized ESD protection for PCB design criteria.
1. Circuit loop.
When current enters circuit loops by induction, these loops are closed and have variable magnetic flux. The current range is proportional to the area of the ring. Larger loops contain more magnetic flux and therefore have stronger current induction in the circuit. Therefore, the loop area must be reduced. The most common loop consists of power and ground wires.
Multilayer PCB designs employ power and ground planes, where possible. Multilayer circuit boards not only minimize the circuit area between power and ground, but also reduce the high-frequency EMI electromagnetic fields generated by ESD pulses. If multilayer boards were not possible, FS Technology would have to connect the circuits for the power and ground lines into a grid. The grid connection can play the role of power and ground, and the printed lines of each layer should pass through holes and the connection interval in each direction should be within 6 cm. In addition, when wiring, the power and ground printed lines produced by FS Technology are as close as possible, which can also reduce the loop area.
Another way to reduce loop area and induced current is to reduce parallel paths between interconnects. When a signal cable longer than 30 cm must be used, a protective wire can be used. A better approach is to place the ground near the signal lines. The signal line should be within 13mm of the protection line or grounding line. Arrange long signal wires (>30cm) or power wires and their ground wires of each sensitive element in a crossover. Crossovers must be separated from top to bottom or left to right.
2. The length of the circuit connection.
Long signal lines can also be used as antennas for receiving ESD pulse energy. Trying to use short signal lines can reduce the efficiency of antennas receiving ESD electromagnetic fields. In order to reduce the printed line length of the interconnection, FS Technology will try to place the interconnection equipment in the adjacent position.
3. Inject the ground charge.
Direct discharge of ESD to the ground plane can damage sensitive circuits. Use one or more high frequency bypass capacitors between the power and ground of the consumables. Bypass capacitors reduce charge injection and maintain the voltage difference between the power and ground ports. The TVS shunts the induced current, maintaining the potential difference of the TVS clamping voltage. To reduce parasitic inductive effects, TVS and capacitors should be placed as close as possible to the protected IC.